Final Program
| Tuesday 27 March 2007 |
Program | |
| 09:30 | 12:55 | Registration Working Group Meetings |
| 12:55 | 13:25 | Welcome Drinks |
| 13:25 | 14:55 | Lunch |
| 14:55 | 15:10 | Opening Session |
| 15:10 | 15:55 | Invited Speaker "Developing Applications for Polymorphic Processors : The Delft Workbench" Koen Bertels, TU Delft, The Netherlands Chair: Pedro C. Diniz, UTL/IST/INESC-ID |
| 15:55 | 17:10 | Session A (long papers: 25 minutes each) |
| Applications I: Image/Video/Graphics Applications | ||
| Chair: Pedro C. Diniz, IST / INESC-ID, Portugal | ||
| "Combining
Flash Memory and FPGAs to Efficiently Implement a Massively Parallel
Algorithm for Content-Based Image Retrieval" Rayan chikhi, Steven Derrien, Patrice Quinton IRISA, France |
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| "Image Processing Architecture for Local Features
Computation" Javier Diaz, Eduardo Ros, Sonia Mota, and Richard Carrillo University of Granada, Spain |
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| "A Compact Shader for
FPGA-based Volume Rendering Accelerators" Guenter Knittel University of Tuebingen, Germany |
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| 17:10 | 17:30 | COFFEE BREAK |
| 17:30 | 19:10 | Session B (long papers: 25 minutes each) |
| Mapping Techniques and Tools | ||
| Chair: Koen Bertels, TU Delft, The Netherlands | ||
| "Partial
Data Reuse for Windowing Computations: Performance Modeling for FPGA
Implementations" Joonseok Park, Pedro C. Diniz Inha University, Republic of South Korea; IST/INESC-ID, Portugal |
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| "Architectural Exploration of the ADRES Coarse-Grained
Reconfigurable Array" Frank Bouwens, Mladen Berekovic, Andreas Kanstein, Georgi Gaydadjiev IMEC, Belgium; TU Delft, The Netherlands |
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| "Optimized Generation of Memory Structure in Compiling
Window Operations onto Reconfigurable Hardware" Yazhuo Dong, Yong Dou, Jie Zhou National University of Defence Technology, Public Republic of China |
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| "Adapting and
Automating XILINX' Partial Reconfiguration Flow for Multiple Module
Implementations" Rainer Scholz, Klaus Buchenrieder University of Bundeswehr, Germany |
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| 20:00 | Conference Dinner | |
| Wednesday 28 March 2007 |
Program | |
| 09:00 | 09:45 | Invited Speaker "Mobile Robotics: Fundamentals and Perspectives" Denis Wolf, ICMC/USP,Brazil Chair: Joao M. P. Cardoso, UTL/IST/INESC-ID |
| 09:45 | 11:25 | Session C (short papers: 20 minutes each) |
| Short Papers I: Applications | ||
| Chair: Denis Wolf, ICMC/USP, Brazil | ||
| "A Space Variant
Mapping Architecture for Reliable Car Segmentation" S. Mota, E. Ros, J. Díaz, R. Rodriguez, R. Carrillo University of Cordoba, Spain |
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| "A
Hardware SAT Solver Using Non-chronological Backtracking and Clause Recording
without Overheads" Shinya Hiramoto, Masaki Nakanishi, Shigeru Yamashita and Yasuhiko Nakashima NARA Institute of Science and Technology, Japan |
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| "Searching
the Web with an FPGA based Search Engine" Séamas McGettrick, Dermot Geraghty, Ciarán McElroy Trinity College Dublin, Republic of Ireland |
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| "Simulation
of the Dynamic Behavior of One-Dimensional Cellular Automata Using
Reconfigurable Computing" Wagner R. Weinert, César Benitez, Heitor S. Lopes, Carlos R. Erig Lima Federal University of Technology - Paraná, Brazil |
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| "Multiple
Sequence Alignment Using Reconfigurable Computing" Carlos R. Erig Lima, Heitor S. Lopes, Maiko R. Moroz, Ramon M. Menezes Federal University of Technology - Paraná, Brazil |
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| 11:25 | 11:45 | COFFEE BREAK |
| 11:45 | 13:25 | Session D (long papers: 25 minutes each) |
| Architecture Design and Exploration - I | ||
| Chair: Joao M. P. Cardoso, IST/ INESC-ID, Portugal | ||
| "A
Linear Complexity Algorithm for the Automatic Generation of Convex Multiple
Input Multiple Output Instructions" Carlo Galuzzi, Koen Bertels, and Stamatis Vassiliadis TU Delft, The Netherlands |
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| "Switching Activity Models for Power Estimation in FPGA
Multipliers" Ruzica Jevtic, Carlos Carreras and Gabriel Caffarena University Politechnic of Madrid, Spain |
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| "A Configurable Multi-Ported Register File Architecture for
Soft Processor Cores" Mazen A. R. Saghir and Rawan Naous American University of Beirute, Lebanon |
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| "MT-ADRES: Multithreading on Coarse-Grained Reconfigurable
Architecture" Kehuai Wu, Andreas Kanstein, Mladen Berekovic, Jan Madsen Technical University of Denmark, Denmark |
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| 13:25 | 14:55 | Lunch |
| 14:55 | 16:35 | Session E (long papers: 25 minutes each) |
| Applications II : Physics Simulation and Circuit Design Applications | ||
| Chair: Yoshiki Yamaguchi, University of Tsukuba, Japan | ||
| "Ubiquitous
Evolvable Hardware System for Heart Disease Diagnosis Applications" Y-M Lee, C-S Choi, S-G Hwang, Hanho Lee Inha University, Republic of South Korea |
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| "FPGA-Accelerated Molecular Dynamics Simulations: an
Overview" Xiaodong Yang, Shengmei Mou, Yong Dou National University of Defence Technology, Public Republic of China |
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| "Reconfigurable Computing for Accelerating Protein Folding
Simulations" Nilton B. Armstrong Jr., Heitor S. Lopes, Carlos R. Erig Lima Federal University of Technology - Paraná, Brazil |
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| "Reconfigurable Parallel Architecture for Genetic
Algorithms: Application to the Synthesis of Digital Circuits" Edson P. Ferlin, Heitor S. Lopes, Carlos R. Erig Lima, Ederson Cichaczewski Positivo University Center, Brazil; Federal University of Technology - Paraná, Brazil |
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| 16:35 | 16:55 | COFFEE BREAK |
| 16:55 | 18:35 | Session F (long papers: 25 minutes each) |
| Architecture Design and Exploration - II | ||
| Chair: Marcio Fernandes, UNIMEP, Brazil | ||
| "Evaluating
Variable-Grain Logic Cells using Heterogeneous Technology Mapping" Kazunori MATSUYAMA, Motoki AMAGASAKI, Hideaki NAKAYAMA, Ryoichi YAMAGUCHI, Masahiro IIDA, Toshinori SUEYOSHI Kumamoto University, Japan |
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| "The Implementation of Coarse-Grained Reconfigurable
Architecture with Loop Self-Pipelining" Yong Dou, Jinhui Xu, Guiming Wu National University of Defence Technology, Public Republic of China |
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| "Asynchronous ARM Processor Employing an Adaptive Pipeline
Architecture" Je-Hoon Lee, Seung-Sook Lee, and Kyoung-Rok Cho Chungbuk National University, Republic of South Korea |
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| "Hardware/Software Codesign for Embedded Implementation of
Neural Networks" Cesar Torres-Huitzil, Bernard Girau, Adrien Gauffriau INAOE, Mexico |
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| 20:00 | Social Event and Conference Dinner | |
| Thursday 29 March 2007 |
Program | |
| 09:45 | 11:25 | Session G (long papers: 25 minutes each) |
| Applications III : Numeric and Combinatorial Applications | ||
| Chair: Eiji Okamoto, University of Tsukuba, Japan | ||
| "Reconfigurable
Hardware Acceleration of Canonical Graph Labelling" David B. Thomas, Wayne Luk Imperial College, United Kingdom |
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| "Multiplication over Fpm on FPGA: A Survey" Jean-Luc Beuchat, Takanori Miyoshi, Yoshihito Oyama, and Eiji Okamoto University of Tsukuba, Japan |
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| "A Parallel Version of the Itoh-Tsujii Multiplicative
Inversion Algorithm" Francisco Rodriguez-Henriquez, Guillermo Morales-Luna, Nazar A. Saqib, NareliCruz-Cortes CINVESTAV-IPN, Mexico |
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| "A Fast Finite Field Multiplier" Edgar Ferrer, Dorothy Bollman, Oscar Moreno University of Porto Rico, Porto Rico |
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| 11:25 | 11:45 | COFFEE BREAK |
| 11:45 | 13:25 | Session H (long papers: 25 minutes each) |
| Inteconnects and Security | ||
| Chair: Pedro Diniz, UTL/IST/INESC-ID, Portuga | ||
| "Partially
Reconfigurable Point-to-Point Interconnects in Virtex-II Pro FPGAs" Jae Young Hur, Stephan Wong, and Stamatis Vassiliadis TU Delft, The Netherlands |
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| "Systematic Customization of On-Chip Crossbar
Interconnects" Jae Young Hur, Todor Stefanov, Stephan Wong, and Stamatis Vassiliadis TU Delft, The Netherlands |
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| "Synthesis of Regular Expressions Targeting FPGAs: Current
Status and Open Issues" Joao Bispo, Ioannis Sourdis, Joao M. P. Cardoso, and Stamatis Vassiliadis IST/INESC-ID, Portugal; TU Delft, The Netherlands |
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| Authentication of FPGA Bitstreams: Why and How Saar Drimer University of Cambridge, United Kingdom |
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| 13:25 | 15:25 | Lunch |
| 15:25 | 17:05 | Session I (short papers: 20 minutes each) |
| Short Papers II: Architectures | ||
| Chair: Joon-seok Park, Inha University, Republic of South Korea | ||
| "An
acceleration method for evolutionary systems based on iterated prisoner's
dilemma" Yoshiki Yamaguchi, Kanazawa Kenji, Yoshiharu Ohke and Tsutomu Maruyama University of Sukuba, Japan |
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| "About the Imporance of Operation Grouping Procedures for
Multiple Word-Length Architecture Optimizations" Nicolas Hervé, Daniel Ménard, Olivier Sentieys IRISA, France |
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| "Real Time Architectures for Moving Objects Tracking" Matteo Tomasi, Javier Diaz, Eduardo Ros University of Granada, Spain |
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| "Design of a Reversible PLD Architecture" Jae-Jin Lee, Dong-Guk Hwang, Gi-Yong Song Chungbuk National University, Republic of South Korea |
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| "Reconfigurable Hardware Evolution Platform for a Spiking
Neural Network Robotics Controller" Patrick Rocke, Brian McGinley, Fearghal Morgan, John Maher NUI, Republic of Ireland |
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| 17:05 | 17:25 | COFFEE BREAK |
| 17:25 | 17:40 | ARC2007 Closing Session |
| 17:25 | 19:05 | South-America Working Group Meeting |
